a new output structure for class e power amplifier (pa) is proposed in this paper. a series lc resonator circuit, tuned near the second harmonic of the operating frequency is added to the output circuit. this resonator causes low impedance at the second harmonic. the output circuit is designed to shape the switch voltage of the class e amplifier and lower the voltage stress of the transistor. t...

In this study, design theory and analysis for the class E power amplifier (PA), considering the metal oxide semiconductor field effect transistor (MOSFET) parasitic input and output capacitances, are proposed. The input resistance and capacitances cause non-ideal input voltage at gate terminal, which affect the specifications of the class E PA. In the proposed study, non-linear drain-to-source,...

The noise assessment of Novel Transparent Gate Recessed Channel MOSFET has been investigated based on the simulated result from ATLAS device simulation. TCAD simulation results show TGRC-MOSFET divulges Conventional Recessed Channel (CRC)-MOSFET in terms of reduction in noise figure, cross correlation, noise conductance and parasitic capacitances. It also achieves higher optimum source impedanc...

A new output structure for class E power amplifier (PA) is proposed in this paper. A series LC resonator circuit, tuned near the second harmonic of the operating frequency is added to the output circuit. This resonator causes low impedance at the second harmonic. The output circuit is designed to shape the switch voltage of the class E amplifier and lower the voltage stress of the transistor. T...

This paper discusses the type of capacitances for Single Gate MOSFET and Double Gate MOSFET including their quantity. The effect of parasitic capacitance makes double gate MOSFET more suitable component for the designing of digital logic switches than single gate MOSFET. Here, we introducing Independent double gate MOSFET operation based on VeSFET concept. Then introducing with the total capaci...

In this paper, we explore the quantitative investigation of the high-frequency performance of Gate Electrode Workfunction Engineered (GEWE) Silicon Nanowire (SiNW) MOSFET and compared with Silicon Nanowire MOSFET(SiNW MOSFET) using device simulators: ATLAS and DEVEDIT 3D. Simulation results demonstrate the improved RF performance exhibited by GEWE-SiNW MOSFET over SiNW MOSFET in terms of transc...

One of effort to overcome the planar MOSFET’s limit is super-junction technology in high voltage power MOSFET. This technology can dramatically reduce both on-resistance and gate charge, which is usually a trade-off. With smaller parasitic capacitances, the super-junction MOSFETs have extremely fast switching characteristics and therefore reduced switching losses. Naturally fast switching behav...

In this work, a novel Silicon on Insulator (SOI) MOSFET is proposed and investigated. The drain and source electrode structures are optimized to enhance ON-current while global device temperature and hot carrier injection are decreased. In addition, to create an effective heat passage from channel to outside of the device, a silicon region has embedded in the buried oxide. In order to reduce th...

Power MOSFET technology has been developed towards higher cell density for lower on-resistance. There are, however, silicon limits for significant reduction in the onresistance with the conventional planar MOSFET technology because of its exponential increase in onresistance according to the increase of blocking capability. One of efforts to overcome the silicon limit is superjunction technolog...

Power MOSFET technology has been developed towards higher cell density for lower on-resistance. There are, however, silicon limits for significant reduction in the onresistance with the conventional planar MOSFET technology because of its exponential increase in onresistance according to the increase of blocking capability. One of efforts to overcome the silicon limit is superjunction technolog...